Time for a serious project. I've got to design a working LCD + Card Reader system for the final CSE 370 end-of-quarter project. All of it via FPGA programming in Verilog, that will manipulate the LCD and card reader on the board.
Well, so far I've went at it 8 hours straight today, but still no luck. Learned a lot nevertheless. Looks like I've just got to sleep on it and take another crack at it tomorrow. This will take a while.
Monday, November 10, 2008
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